CoreSight™ Design Kits provide the most complete on-chip debug and real-time trace solution for the entire system-on-chip (SoC), making ARM® processor-based SoCs the easiest to debug and optimise.
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CoreSight technology builds on ARM’s Embedded Trace Macrocells™ (ETM) products, which are widely licensed and supported by the ARM RealView® development tools and over 20 other debug and performance analysis tools.
To speed the development of more reliable, higher performance products the CoreSight Design Kits provide the on-chip resources needed for tools to provide the following key tasks: Debug of symmetric multi-processing and asymmetric multicore systemsThe CoreSight Debug Access Port (DAP) and Embedded Cross Trigger (ECT) enable tools, such as the ARM RealView Debugger to provide a correlated view with synchronized control of multiple processors in a single instantion of the debugger, even when processors may be in different power and clock domains.
Powerful interactive debugging with real-time visibilityReal-time updating of views in to the complete system state including memory contents, processor and peripheral registers. State-of-the-art debug features such as Green Hills' TimeMachine and Lauterbachh's Context Tracking System allow stepping forward and back through trace data collected in real-time from actual applications running on final products.
Performance optimisation
Optimisation using actual best/worst/average execution times at the instruction, block, function and task levels. Excellent new profiling tools such as the ARM Profiler or Lauterbach's Cache Analyzer allow the developer to get 20% to 500% improvements in code performance through knowing where the program is spending its time and where and why performance bottlenecks exist.
Line and path code coverage of assembler and C/C++
Quality code coverage metrics ensure the highest product reliability through comprehensive and targetted software testing with tools such as Code Coverag Analysis and Call Graph Exploration in the ARM Profiler.
High level system views with OS and RTOS context
Using contextual data in the ETM trace or code instrumentation via the Instumentation Trace Macrocell (ITM), high level software context and analysis of asynchronous real-time events such as interrupts and exceptions are provided with the RTOS/OS awareness and event viewer features of many debuggers.
Real-time data monitoring, common to MCU and automotive applications
Available in many low cost MCU tools, such the ARM Keil Microcontroller Development Kit.Minimum pin debugFor chip manufacturers, the CoreSight solution has a low pin count, though the sharing of trace port pins or the use of an embedded trace buffer that does not require any trace port as well as a 2-pin Serial Wire Debug port, a higher performance alternative to JTAG.CoreSight Design Kits consist of the following components: - Debug Access Port that provides debugger access to the cores and busses in an SoC, across multiple power and clock islands, enabling exceptionally high download speeds direct to memory.
- Embedded Cross Trigger that synchronized debug and trace across multiple cores.
- Embedded Trace Macrocells that non-invasively generate cycle-accurate, instruction and data trace of ARM processors running at full speed.
- AHB Trace Macrocell that traces activity on the AMBA high speed system bus.
- Trace Funnel used to combine multiple trace sources together.
- Embedded Trace Buffer for storing trace data on-chip at high rates at 32-bit data width, eliminating the need for dedicated trace port pins or an external trace collection unit.
- Trace Port Interface Unit to transmit trace data off-chip via 2-34 pins at frequencies asynchronous to the core.
- Instrumentation Trace Macrocell for high level, low bandwidth, software generated trace.
- Serial Wire Debug a higher performance 2-pin debug port that replaces the 5/6-pin JTAG interface.
- Serial Wire Viewer provides a single pin output for Instrumentation Trace.
- Integration Kit contains RTL test benches, test vectors and full documentation for easy validation of a designer's own CoreSight subsystem.
CoreSight Design Kits available for licensing:
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