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Velocity DDR PHY (High-speed physical interface)

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The ARM® Velocity™ DDR PHY is a high-speed physical interface solution for a broad range of SDRAM DDR (double-data rate) applications ranging from high-speed mission critical to low-power memory sub-systems. This robust silicon-proven solution has been optimized for high data bandwidth, lowest power and enhanced signalling integrity features to enable the support for a wide range of applications from high-end graphics, high-speed communications to low-power handheld.

Part of the ARM product family of Artisan® Physical IP, the Velocity DDR PHY brings design flexibility, flow simplicity and application configurability to System on Chip (SoC) memory interfaces. Available in leading foundry processes across multiple geometries and process nodes.

DDR PHYsApplications

DDR

Main Stream memory interfaces for DDR 1/2/3 SDRAM devices

GDDR

High bandwidth memory interfaces for GDDR 3/4 SGRAM devices

MDDR

Low-power memory interfaces for LPDDR SDRAM devices

Data flow using DDR Memory

DDR PHYs interface diagram

Features
  • Flexible DDR solution that support multiple JEDEC standards
  • Configurable for Power/Area Optimization
  • Variable lane support 
  • Wire bond and flip chip configurations 
  • Easy to integrate
  • Comprehensive documentation 
  • Validated and characterized silicon
  • Built-in compensation circuit (dynamic and static impedance matching)
  • Reliable and robust I/O interfaces 
  • Seamless integration with other ARM I/Os
  • Built-in manufacturing test support 
  • Excellent noise immunity and signal integrity
  • Designed to minimize noise due to high-speed switching
 
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